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This project contains reference implementations of edge access network data-planes which are optimized for high-performance packet processing on Intel® architecture, and which futhermore may be deployed on an NFV platform.

The key purpose of these reference implementations is the characterization of packet-processing performance and power-consumption on Intel® Xeon® platforms.

The first of these is the Intel vCMTS (virtualized Cable Modem Termination System) Reference Dataplane and NFV stack for cable access networks. Source-code and installation instructions for this dataplane application and accompanying NFV stack may be downloaded from this site.