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Scalable Video Technology (SVT) is a software-based video coding technology that is highly optimized for Intel® Xeon® Scalable processors and Intel® Xeon® D processors. Using the open source SVT encoder core found on this website, it is possible to spread video encoding processing across multiple Intel® Xeon® processors. With many data centers using Intel® Xeon® processors, a real advantage of processing efficiency can be achieved by using a combination of SVT video encoders and Intel® Xeon® processors. The large core count available on modern processors (e.g. up to 56 cores per dual-socket platform) makes it possible to scale the performance of SVT encoders extremely well as a function of the available computational resources. 

SVT Project Goals

The objective of the open source Scalable Video Technology (SVT) project is to provide flexible high-performance software encoder core libraries for media and visual cloud developers. Such libraries will accelerate innovation of new visual cloud services, serving as a starting point for developers to build faster and higher-quality full-feature encoder products. SVT is designed for cloud-native scalability, and it provides outstanding tradeoffs between visual quality and performance, for both VOD and live visual cloud applications.

About SVT

The SVT encoder architecture is designed specifically for x86 processors, and heavily optimized for Intel® Xeon® Scalable processors in particular, and allows for the encoder core to be split into independently operating threads, each thread processing a different segment of the input video source. These segments are run in parallel on different processor cores, without introducing any loss in fidelity. The SVT architecture provides 3 dimensional parallelism optimization - process based parallelism, picture based parallelism, and segment based parallelism. In addition, SVT architecture provides multi-precision-level features like human visual system (HVS) optimized classification resulting in better rate/quality tradeoffs, and Intel® Xeon® processor-specific performance tuning.

Three modes are available
  • Visual Mode (Tune 0): Optimized for visual quality
  • PSNR/SSIM Mode (Tune 1): Default encoder mode; Optimized to maximize the PSNR/SSIM BDRate performance
  • VMAF Mode (Tune 2): Optimized to maximize VMAF BDRate performance
In addition, up to thirteen presets: M0-M12, provide fine granularity in the selection of the tradeoffs between quality and speed.
SVT architecture is CODEC standard-agnostic, i.e., it can be applied for the development of encoders that are compliant with different standards. Intel has created an open source SVT-HEVC encoder core for developers to use in creating their own products and services. The SVT-HEVC encoder core is made available to the open source community via a highly-permissive OSI approved BSD+Patent license. The same architectural advantages will be available in SVT-AV1 and any other future SVT CODECs. 
Find more details about SVT in our whitepaper.


The SVT-HEVC encoder core supports HEVC Main and Main10 profiles (up to Level 6.2) and video input resolutions up to 8Kp60, 4:2:0, 8-bit and 10-bit. The SVT-HEVC encoder was first released to the Open Source community in September of 2018. 

Visit the SVT-HEVC Trello page

SVT-HEVC GitHub Repo


Intel has announced they are working on an SVT-AV1 encoder to be available in H1' 2019. For the latest product updates, subscribe to the SVT-AV1 mailing list.

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